CS 367 Planned Schedule, Fall 2019

1 Projects

All projects will be posted and announced as early as we have them prepared, generally with two weeks to complete the assignment.
These dates are subject to change as needed during the semester.

  • Project 0: Tuesday, Sep 3 - Monday, Sep 16 (11:59pm)
  • Project 1: Wednesday, Sep 18 - Wednesday, Oct 2 (11:59pm)
  • Project 2: Monday, Oct 21 - Monday, Nov 4 (11:59pm)
  • Project 3: Monday, Nov 18 - Monday, Dec 2 (11:59pm)

2 Test Schedule

Tests are bigger milestones, and their dates are announced ahead of time.
Only severe scheduling anomalies would force a delay in test dates.

3 Topics and Readings

Note, you can access our textbook in the Gateway Library (JC), call #QA76.5.B795 2016

Below is a tentative schedule, which is subject to change as needed.

Week of Topic Lecture Topics Recitation Text Readings
Monday       (For this Week)
8/26
Ch2: Data Rep. Course Intro, C Review
C Review
1 (Systems Overview)
   

Review C (K&R ch. 5, 6, 7)
9/2
  No Monday Class This Week
C Linked Lists
2.1-2.3 (Data Rep.)
    Bitwise and Integer Operations

 
9/9
  Integers
Floating Point Encoding
Bit Puzzles
2.4-2.5 (Floating Point)
9/16

Floating Point Operations
Floating Point
2.4-2.5 (Floating Point)
  Ch3: Program Rep Introduction to x86-64 Assembly
  3.1 (Intro to Assembly)
9/23
Operations, Condition Codes
x86-64 Assembly Basics
3.1-3.4 (Assembly Basics)
    Control Flow
  3.6 (Control Flow)
9/30
  Control Flow and Procedures
x86-64 Control Flow
3.6-3.7 (Control and Procs)
    Procedures
3.7 (Procedures)
10/7
  Procedures
GDB Covers Chapter 2 and 3.1-3.5
    TEST 1, Wed/Thurs
3.7 (Procedures)
10/14   Mon Class on Tues, Tues Cancelled
x86-64 Procedures
3.8 (Data Structures)
    Data Structures
 
10/21   Adv. Topics in Assembly x86-64 Data Structures
3.9-3.11 (Adv Topics)
   Ch8: Processes Exceptional Control Flow / Processes

8.1-8.3 (Exceptions)
10/28
Exceptional Control Flow / Processes Stack Representation
8.1-8.3 (Exceptions)
    Signals
  8.5-8.6 (Signals and NLJ)
11/4
 Ch7: Linking Linking Processes and Signals
7 (Linking)
   Ch4: Architecture Y86 and Machine Code
  4.1 (Y86)
11/11

TEST 2, Mon/Tues Linking Covers Chapters 3 and 8
    Digital Logic and Circuits
  4.2 (Digital Logic)
11/18
  CPU Design and Pipelining
Architecture
4.3 (CPU Design)
   


11/25
Ch6: Caching Caching
N/A
6.1-6.4 (Caching)
 
Thanksgiving Break


12/2
 Ch9: Memory Virtual Memory
Virtual and Dynamic Memory
9.1-9.6 (Virtual Memory)
 
Dynamic Memory

9.9 (Dynamic Memory)